Work

Upstream

8 pull requests, 5 merged. States fetched from GitHub on 2026-09-23; nothing here is typed by hand.

llvm/llvm-project#224105 [MLIR][NVVM] Add SM version requirements to mbarrier Ops open

Records which GPU generations (SM versions) each mbarrier operation needs, so the compiler can reject unsupported targets early.

llvm/llvm-project#222916 [MLIR][NVVM] Fix the lowering of legacy mbar.arrive_drop merged

Fixes how a legacy GPU barrier operation (mbarrier arrive-and-drop) is lowered to NVVM.

llvm/llvm-project#221595 [mlir][vector] Support fixed-size masks in `eliminateVectorMasks` open

Extends mask elimination to fixed-size vector masks, not only scalable ones.

llvm/llvm-project#219681 [mlir][vector] Don't fold in_bounds for negative constant indices merged

Stops a fold that wrongly marked a read as in bounds when the constant index was negative.

llvm/llvm-project#215340 [mlir][vector] Add a pass to infer the in_bounds attribute open

A pass that proves vector memory accesses stay in bounds and marks them so, which removes masked loads; on a PolyBench kernel on AArch64 it took masked calls from 14 to 0.

llvm/llvm-project#214614 [mlir][affine] Implement ValueBoundsOpInterface for affine.for merged

Teaches the bounds analysis what range an affine loop counter can take, so later passes can prove accesses stay inside a buffer.

llvm/llvm-project#213506 [mlir][vector] Don't fold in_bounds for scalable vector dimensions merged

Stops the compiler assuming a vector read is in bounds when the vector's length is only known at run time (ARM scalable vectors), which could read past the end of a buffer.

spack/spack-packages#4291 ucx: add external package detection merged

Lets Spack detect an already-installed UCX instead of building its own.


Results

Every number the site quotes, with its source, the hardware and, where one exists, the command that reproduces it. Hover or tap a value for the receipt.

resultvaluekind
llvm.masked.* calls, PolyBench jacobi-2d (MEDIUM, N=250, TSTEPS=100), vector width 4 · AArch64 NEON, Apple silicon (no SVE); not measured on SVE14 → 0sourcehttps://github.com/llvm/llvm-project/pull/215340checked2026-09-22hardwareAArch64 NEON, Apple silicon (no SVE); not measured on SVEcommandbench/run.shkindmeasuredmeasured
kernel instructions; branches 108 → 12; transfers proved in-bounds 0 → 12 · AArch64 NEON, Apple silicon317 → 85sourcehttps://github.com/llvm/llvm-project/pull/215340checked2026-09-22hardwareAArch64 NEON, Apple siliconcommandbench/run.shkindmeasuredmeasured
wall clock, median of 21 runs, −80.3 % (≈5.1×); noise floor 0.45 % (A-vs-A plus the larger MAD); outputs identical · AArch64 NEON, Apple silicon (no SVE)14.70 → 2.89 mssourcehttps://github.com/llvm/llvm-project/pull/215340checked2026-09-22hardwareAArch64 NEON, Apple silicon (no SVE)commandbench/run.shkindmeasuredmeasured
llvm-project 7 (4 merged), spack-packages 1 (merged); closed-unmerged PRs are not counted8 pull requests, 5 mergedsourcesrc/data/prs.json (tools/fetch_prs.py)checked2026-09-23kindmeasuredmeasured
single core, generated matmul + bias + activation kernel · not recorded on the résumé; add it before this goes on a page64 GFLOP/ssourcerésumé, "ML Compiler and Inference Performance (2026)"checked2026-09-21hardwarenot recorded on the résumé; add it before this goes on a pagekindself-reportedself-reported
vs a hand-tuned blocked C baseline; 84 % of the measured machine ceiling2.4×sourcerésumé, "ML Compiler and Inference Performance (2026)"checked2026-09-21kindself-reportedself-reported
same tiled, fused, vectorised kernel; outerproduct vs default vector.contract lowering · ARM64≈6×sourcerésumé, "Codegen analysis of the production MLIR lowering stack"checked2026-09-21hardwareARM64kindself-reportedself-reported
DSMC simulator runtime vs Sandia SPARTA, same hardware and problem setupsourceSankhyaSutra Labs internal benchmark (2018–2024), résuméchecked2026-09-21kindself-reportedself-reported
cluster nodes the simulator scaled to100+sourcerésumé, SankhyaSutra Labschecked2026-09-21kindself-reportedself-reported
DeepSeek V4 Flash, keep-everything vs summaries with pinned rows, question asked first16/36 → 36/36sourcenext_series/T01_context_and_memory/SUMMARY.md in dhairyashilRG/agent-harnesses-2026checked2026-09-19kindmeasuredmeasured
successful injections across five models, undefended, AgentDojo important_instructions2 to 35 of 97sourcenext_series/T02_agent_security/series/FACTS.md in dhairyashilRG/agent-harnesses-2026checked2026-09-19kindmeasuredmeasured
three LLM judges vs AgentDojo ground truth, 300 itemsagreement 0.72–0.78, κ 0.45–0.56sourcenext_series/T03_evals/series/FACTS.md in dhairyashilRG/agent-harnesses-2026checked2026-09-19kindmeasuredmeasured
graded local attempts, eight open models, one MacBook Pro (M3 Max, 128 GB)1,512sourcenext_series/T04_local_models/SUMMARY.md in dhairyashilRG/agent-harnesses-2026checked2026-09-19kindmeasuredmeasured
posts by others on the LLVM Discourse RFC (16 posts, 6 participants, 2026-08-25 to 2026-09-21)9sourcehttps://discourse.llvm.org/t/91649.jsonchecked2026-09-22commandcurl -sL https://discourse.llvm.org/t/91649.json | python3 -c "import json,sys;d=json.load(sys.stdin);print(sum(p['username']!='dhairyashilRG' for p in d['post_stream']['posts']))"kindmeasuredmeasured

kind: measured = by me, re-runnable · self-reported = my claim without a public reproduction · paper = someone else's.


Employment

2024–

AMD, Bangalore

Senior Member of Technical Staff, profiling team

I work on uProf, the profiler the compiler, runtime and silicon teams use as a shared reference when a performance problem has to be attributed to a layer. I built out its tracing for multi-node MPI and OpenMP runs, analyse compiler-generated code for vectorisation failures and memory stalls, and take findings back to the compiler and architecture teams with a reproducer and a cost attached.

Roughly how the time divides. Hover a segment.

2018–24

SankhyaSutra Labs, Bangalore

Tech Lead · Senior Software Engineer · Member of Technical Staff

I owned a Monte Carlo particle simulator (DSMC) in C++ and MPI from the first line to release. It ran sourceSankhyaSutra Labs internal benchmark (2018–2024), résuméchecked2026-09-21kindself-reported faster than Sandia's SPARTA on the same hardware and problem, after profiling isolated cache misses and load imbalance and the particle layout and collision algorithm were redesigned. It scaled to 100+sourcerésumé, SankhyaSutra Labschecked2026-09-21kindself-reported nodes. A space-filling-curve partitioning scheme was implemented, measured, and abandoned for its communication cost.

2011–17

Indian Institute of Science, Bangalore

PhD and MSc (Engineering): high-performance computing, parallel algorithms, numerical methods

Three peer-reviewed papers in computational physics (J. Chem. Phys. 2020 and 2015, Phys. Rev. E 2013), on Google Scholar.